A drop of the power supply voltage that depends on the position on a chip occurs due to the resistance of the power supply line. Therefore, transistors in different positions in the chip have different characteristics. A semiconductor device directed to suppressing the occurrence of different characteristics is known in which the chip is divided into blocks of circuit, and the back bias voltages applied to FETs (Field Effect Transistors) in the blocks are controllable on the block basis (see Japanese Laid-Open Patent Publication No. 2008-227155, for example).
There is known a circuit that generates a reference voltage that is changed in accordance of fluctuations in the power supply voltage (see Japanese Laid-Open Patent Publication No. 2007-128395, for example).